In this work a novel single-ended 8T static random access memory cell with low power consumption and high read static noise margin is proposed. In the proposed cell to improve read margin differential wordlines are utilized. Additionally during read operation the storing nodes of the cell are totally decoupled from the bit line, which enhances the read capability of the proposed cell. The read static margin of the proposed 8T SRAM cell is 67.37% improved as compare to 6T SRAM cell. The proposed cell saves 41.5% average power during write ‘1’ operation and saves 39.78% power in write ‘0’ operation. During read operation it saves 89.91% power as compare to standard 6T SRAM cell. The proposed 8T SRAM cell shows less propagation delay as compare to conventional 6T SRAM cell.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    High speed 8T SRAM cell design with improved read stability at 180nm technology


    Beteiligte:
    Raikwal, P. (Autor:in) / Neema, V. (Autor:in) / Verma, A. (Autor:in)


    Erscheinungsdatum :

    2017-04-01


    Format / Umfang :

    407097 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Design of Low Power & High Speed Comparator of SAR ADC using 180nm Technology

    kushwah, Harshita / Gamad, R. S. / Gurjar, R. C. | IEEE | 2020



    Single Event Analysis on SRAM 180nm CMOS Memory with Super Voter Protection Technique

    dos Santos, Angela Alves / Deucher, Alexsander / de Lazari, Daniel B. et al. | IEEE | 2021