Real-time embedded systems are present in various application domains such as automotive, aeronautical, space, and telecommunications. Avionics systems (i.e., aviation electronics) represent a specialized class for the aerospace branch. It is a fact that avionics are getting more and more complex considering functionality and design and also using an increased number of digital computer resources. Besides the safety-critical aspect, performance and power consumption have also to be taken into consideration for new designs. Therefore, it is needed to adopt new system capabilities like runtime reconfiguration. In this context, modern system-on-chip (SoC) composed by heterogeneous hardware (i.e., microcontroller and field-programmable gate arrays — FPGA) can figure as an alternative solution. Then, reconfiguration is allowed to take place in runtime, which makes FPGA-based devices interesting for future avionics systems design. Considering this scenario, we introduce in this paper a runtime reconfiguration design implemented using a SoC. Basically, two different areas comprise the SoC hardware architecture: a hard processor area and a reconfigurable area. The former has the authority to manage which configuration will be programmed/used in a given time. The developed design enables both full and partial reconfiguration. In the research work results, we show how different kinds of configuration bitstream modes (i.e., and/or, scrub, scrub clear/set) and data compression impact the system's performance and power consumption. For instance, one full reconfiguration bitstream with no data compression takes ∼29 ms to complete with average power consumption of ∼42 mW. On the other hand, a given partial reconfiguration (and/or mode) takes ∼2.73 ms to complete with ∼22 mW average power consumption. Finally, our proposed design opens up the possibility to optimize a system towards adaptability to comply with real-time constraints changing regarding performance and power consumption.


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    Titel :

    A runtime reconfiguration design targeting avionics systems


    Beteiligte:


    Erscheinungsdatum :

    2016-09-01


    Format / Umfang :

    394777 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Reconfiguration in an Integrated Avionics Design

    Seeling, K. A. / IEEE / AIAA | British Library Conference Proceedings | 1996


    Runtime FPGA Partial Reconfiguration

    McDonald, E. J. | IEEE | 2008


    Runtime FPGA partial reconfiguration

    McDonald, Eric J. | IEEE | 2008


    Runtime FPGA Partial Reconfiguration

    McDonald, E.J. | Online Contents | 2008


    Autonomous dynamic reconfiguration of integrated avionics systems

    Omiecinski, Tomasz / Johnson, David | AIAA | 1997