A shared memory message system for communication between modules configured to perform a function related to controlling a vehicle in a computer system on the vehicle. The system may include a plurality of modules each representative as a node, the plurality of modules collectively representative as a plurality of nodes, each node a publisher node and/or a subscriber node, a topic registry having message storage location information, message buffers configured to store published messages, and a communication bus coupled to the topic registry, the message buffers, and the plurality of nodes. The communication bus is configured such that publisher node messages are stored in a message buffer and associated storage location information is stored in the topic registry without going through the kernel of the computer system, and such that subscriber nodes can read messages from a message buffer without going through the computer system kernel.
SHARED MEMORY ARCHITECTURE FOR A VEHICLE
2020-07-02
Patent
Elektronische Ressource
Englisch
IPC: | G05D SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES , Systeme zum Steuern oder Regeln nichtelektrischer veränderlicher Größen / B60R Fahrzeuge, Fahrzeugausstattung oder Fahrzeugteile, soweit nicht anderweitig vorgesehen , VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR / H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION , Übertragung digitaler Information, z.B. Telegrafieverkehr |
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