This paper presents a stability evaluation of two Virtual Synchronous Machine (VSM) implementations in the control of Voltage Source Converters (VSCs): a current-controlled (CCVSM) and a voltage-controlled (VCVSM) version of the VSM. The performances of the two control implementations are analyzed under power reference and grid frequency variations and the evaluation of their stability properties is carried out by adopting the impedance-based stability analysis. The results of the dq impedance analysis of the two VSMs implementations reveal a clear differentiation between the CCVSM and the VCVSM, particularly in the very low frequency range, even if a close similarity is observed in the time domain responses. The dq impedances of both implementations show an RL behaviour in the medium frequency range, but when inspecting the stability margin on the Nyquist plot, the VCVSM appears to have a lower stability margin than the CCVSM from the intersection with the unit circle. ; Gobierno Vasco-Eusko Jaurlaritza


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    Titel :

    Impedance-Based Stability Evaluation of Virtual Synchronous Machine Implementations in Converter Controllers



    Erscheinungsdatum :

    2018-01-01


    Anmerkungen:

    International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia) Niigata, Japan. 20-24 May 2018. Pp. 759-766. IEEE, 2018



    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Klassifikation :

    DDC:    629




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